Recently, Lam Group launched the Coronus DX product, the industry's first wafer edge deposition solution designed to better address key manufacturing challenges in next-generation logic, 3D NAND and advanced packaging applications. As the critical dimensions of semiconductor chips continue to shrink, their fabrication becomes more complex, with hundreds of process steps required to build nanoscale devices on silicon wafers. In just one process step, Coronus DX deposits a proprietary protective film on both sides of the wafer edge that helps prevent defects and damage that often occur during advanced semiconductor manufacturing. This powerful protection technology improves yield and enables chipmakers to implement new leading-edge processes to produce next-generation chips. Coronus DX is the latest addition to the Coronus® product line, extending Lam's leadership in wafer edge technology.
"In the era of 3D chip manufacturing, production is complex and expensive. Building on Lam's expertise in wafer edge innovation, Coronus DX helps enable more predictable manufacturing and dramatically improving yields, paving the way for the adoption of advanced logic, packaging and 3D NAND production processes that were previously infeasible."
Deposition adds critical protection during process integration
Complementary to Coronus wafer edge etch technology, Coronus DX enables new device architectures that are game-changing for chipmakers. Repeated thin film layers cause residue and roughness to accumulate along the wafer edge, and they can flake off, drift to other areas and create defects that lead to device failure. for example:
In 3D packaging applications, material from the back end of the production line can migrate and become a source of contamination in subsequent processes. Wafer sag can affect the quality of wafer bonding.
The long wet etch process in 3D NAND fabrication can cause severe damage to the substrate at the edges.
When these defects cannot be etched away, Coronus DX deposits a thin dielectric protection layer on the edge of the wafer. This precise and tunable deposition helps resolve these common issues that can affect semiconductor quality.
"CEA-Leti is applying its expertise in innovative, sustainable technology solutions to help Lam Group address key challenges in advanced semiconductor manufacturing," said Anne Roule, Head of Semiconductor Platforms at CEA-Leti. By simplifying 3D integration, Coronus DX dramatically increases yield and enables chipmakers to adopt breakthrough production processes."
Proprietary Process Drives Yield Improvement
Coronus DX incorporates state-of-the-art precise wafer centering and process control, including built-in metrology modules, to ensure process consistency and repeatability. Coronus products incrementally improve wafer yields by 0.2% to 0.5% per etch or deposition step, which can lead to a 5% yield improvement for the entire wafer production process. Manufacturers processing more than 100,000 wafers per month can increase chip production by millions – worth millions of dollars – in a year with Coronus.
All major chipmakers use Coronus
First launched in 2007, the Coronus product range is used by major semiconductor manufacturers with thousands of cavities installed worldwide. Lam's Coronus product line is the industry's first mass production proven wafer edge technology. Its Coronus and Coronus HP solutions are etch products designed to prevent defects by removing edge layers. Coronus solutions are used to manufacture logic, memory and specialty process devices, including leading 3D devices. Coronus DX is currently being used in high-volume manufacturing at leading customer fabs around the world.
Dr. Hideshi Miyajima, executive officer of memory process technology at Kioxia Corporation, said: "Improving the quality of the production process through advancements in areas such as wafer edge technology is critical for us to deliver next-generation flash memory products to customers at scale. We look forward to continuing our partnership with Lam Group and its Coronus solutions for leading-edge wafer production."